Multicore Arm Processor
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LX2160A:
Layerscape® LX2160A, LX2120A, LX2080A Processors
5G standards allow for deployment options with a flexible, functional split between networking elements. This allows for implementations that are cloud/centralization centric.
O-RAN standards define the central unit as the entity responsible for Transport/S1, PDCP and RRC/Control plane processing in an option 2 split configuration. Deployment options range widely from low-end in-building processing with ≤25-50Gbps capacity to scale-out scenarios supporting multiple Tbps aggregate processing.
The distributed unit is responsible for MAC/RLC and High-PHY processing, implemented as C code on general-purpose (eg Arm) devices. Cost and power are minimized by using optimized (Arm NEON) SIMD kernels and a look-aside accelerator device for forward error correction and DSP processing acceleration.
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